1. Field of the Invention
The present invention relates to a solid-state imaging device which is applicable to camera systems such as video cameras, monitor cameras, door checker cameras, on-vehicle cameras, cameras for TV telephone and cameras for multimedia. In particular, the present invention relates to a solid-state imaging device such as a charge-coupled device, which contributes to reduction of voltage and power consumption of a camera system.
2. Description of the Related Art
At present, a generally used charge-coupled device (hereinafter, simply referred to as a CCD) has an electronic shutter function for controlling exposure time. The electronic shutter function is employed for controlling the exposure time without a mechanical exposure time control mechanism, which results in reduction in size, weight, cost and power consumption. In the CCD, electrical charges are generated by photoelectrical conversion and accumulated in photodiodes. The charges are transferred (read) from the photodiodes to a neighboring vertical CCD in response to a read pulse which is applied to transfer gates once for each field period.
In the case where the CCD does not have the electronic shutter function, the exposure time equals one field period determined by the interval between the read pulses, that is, 1/60 of a second in an NTSC system. On the other hand, in the case where the CCD has the electronic shutter function, all the electric charges, which are photoelectrically converted from light and then accumulated in the photodiodes, are allowed to flow (drain) toward an N-type substrate by applying an electronic shutter pulse to the N-type substrate. As a result, no charge is left in the photodiodes just prior to an exposure period. Then, the exposure period for the photoelectrical conversion process is started.
In such a case, the exposure time is equal to a time duration between the electronic shutter pulse and the read pulse. According to the electronic shutter function, the exposure time can be reduced to about 1/10000 of a second by controlling the timing of the application of the electronic shutter pulse.
FIG. 7 shows an example of a system configuration of a conventional solid-state imaging device having the electronic shutter function. FIGS. 8A and 8B show the configuration of a CCD section of the solid-state imaging device. FIG. 8A is a plan view showing the CCD section; and FIG. 8B is a cross-sectional view taken along a line VIIIb--VIIIb in FIG. 8A.
As shown in FIG. 7, a conventional solid-state imaging device 200 includes a CCD section 201. The CCD section 201 receives a light beam reflected from an object and photoelectrically converts the light beam for each pixel, and transfers the charges generated by the photoelectrical conversion. As shown in FIGS. 8A and 8B, the CCD section 201 includes a plurality of photodiodes (light-receiving portions) 1 arranged on an N-type substrate 10 in a matrix manner, a plurality of vertical CCDs 2, and a horizontal CCD 3. The photodiodes 1 photoelectrically convert incident light into signal charges and store them. The vertical CCDs 2 vertically shift packets of the signal charges toward the horizontal CCD 3, and the horizontal CCD 3 horizontally transfers the signal charges to an output stage. Transfer gates 4 for transferring the charges accumulated in the photodiodes 1 to the vertical CCD 2 are provided between each of the photodiodes 1 and the corresponding vertical CCD 2.
A P-type well region 11 is formed on a surface of the N-type substrate 10. An N.sup.- -type region 12 is formed on the surface of the P-type well region 11. The photodiode 1 includes a P.sup.+ -type region 1a and an N.sup.+ -type charge accumulating region 1b for accumulating the photoelectrically converted charges. The P.sup.+ -type region 1a is formed in the surface area of the N.sup.- -type region 12. The N.sup.+ -type charge accumulating region 1b is formed in the surface area of the N.sup.- -type region 12 below the P.sup.+ -type region 1a.
The vertical CCDs 2 are formed in the surface region of the N.sup.- -type region 12 along lines of longitudinally arranged photodiodes. Each of the vertical CCDs 2 includes an N.sup.+ -type charge transfer region 2a, through which the charges are transferred, and a transfer electrode 2b. The transfer electrode 2b is formed on the charge transfer region 2a interposing an insulating film (not shown) therebetween. A P.sup.+ -type region 13 protruding into the P-type well region 11 is provided below the N.sup.+ -type charge transfer region 2a. A light-shielding film 15 is placed above the transfer electrode 2b.
A P-type read gate region 4a for reading out the charges accumulated in each of the photodiodes 1 to the vertical CCD 2 is formed between one end of the N.sup.+ -type charge accumulating region 1b of each of the photodiodes 1 and the N.sup.+ -type charge transfer region 2a. Part of a conductor layer constituting the vertical transfer gate 2b is positioned on the read gate region 4a, and serves as a read gate electrode 4b. A P.sup.+ -type region 14 is provided as a channel stopper portion between the other end of the N.sup.+ -type charge accumulating region 1b of each of the photodiodes 1 and the N.sup.+ -type charge transfer region 2a.
The solid-state imaging device includes a timing IC 202 and an pulse-amplitude modulation circuit 203 as shown in FIG. 7. The timing IC 202 generates a plurality of base pulses (or reference pulses) .PHI.s for an electronic shutter (hereinafter, simply referred to as base pulses) for each constant repetitive cycle, in this case, for each field period. The pulse-amplitude--modulation circuit 203 changes an amplitude of the base pulse .PHI.s based on a signal Vs so as to generate a shutter pulse .PHI.s'. The shutter pulse .PHI.s' output from the pulse-amplitude modulation circuit 203 is superimposed on a DC voltage V.sub.OFD for overflow control, and then is applied onto the N-type substrate 10 of the CCD section 201. The output of the pulse-amplitude modulation circuit 203 is connected to the substrate 10 of the CCD section 201 via a capacitor 204, while the DC voltage V.sub.OFD is applied onto the substrate 10 of the CCD section 201 via a diode 205.
In the solid-state imaging device 200 having the aforementioned configuration, a read pulse .PHI.R is applied to the read gate electrode 4b for each field period so that the charges accumulated in the photodiodes 1 are transferred to the vertical CCD 2. A plurality of shutter pulses .PHI.s' are applied onto the substrate 10 for one field period so as to allow the charges accumulated in each of the photodiodes 1 to flow toward the substrate. The charges transferred to the vertical CCD 2 are externally output as imaging signals via the horizontal CCD 3.
FIG. 9 shows the timing relationship between the read pulse .PHI.R, the shutter pulse .PHI.s', horizontal transfer pulses .PHI.H and CCD output signals Sc in the case where the exposure time is 1/10000 of a second.
As can be seen from FIG. 9, the base pulse .PHI.s generated in the timing IC 202 is converted into the shutter pulse .PHI.s' having an amplitude of Vs by the pulse-amplitude modulation circuit 203. Then, the shutter pulse .PHI.s' superimposed on the DC voltage V.sub.OFD for overflow control is applied onto the substrate 10 of the CCD section 201.
Since such an electronic shutter operation allows all the charges accumulated in the photodiodes 1 to flow toward the N-type substrate 10 through the P-type well 11 positioned below the photodiodes 1, the shutter pulse .PHI.s' should have an extremely large amplitude (for example, 22 V). When the pulse is applied, extremely large variation in potential occurs over the entire substrate. Therefore, the output signal of the CCD section 201 is adversely affected by the pulse. Accordingly, the shutter pulse .PHI.s' is generally applied during a horizontal blanking period or a vertical blanking period in which no video signal is output from the CCD section 201, thereby preventing the output signal from being adversely affected
Moreover, the electronic shutter operation as described above can theoretically control the exposure time with the final pulse along among a plurality of shutter pulses .PHI.s' (hereinafter, also referred to as a shutter pulse train) applied to the substrate 10 of the CCD section 201 for one field period. The electronic shutter operation is usually performed for receiving bright illumination. Therefore, there is a possibility that excessive charges overflow or leak from the photodiodes 1 toward the vertical CCD 2 before the final pulse of the shutter pulses is applied to the substrate. In order to prevent the excessive charges from leaking, the shutter pulse is always applied in each of the horizontal blanking periods during one field period, that is, by the time when the final pulse is applied.
FIGS. 10A to 10C are timing charts showing how the shutter pulse .PHI.s' is applied and the amount of accumulated charges C1 for one field period in the photodiode for comparison. FIG. 10A corresponds to the case where the electronic shutter operation is not performed. In FIG. 10A, an output signal Vo corresponds to the charges accumulated in a predetermined photodiode 1 for 1/60 of a second of exposure time (i.e., one field period).
FIG. 10B corresponds to the case where only one shutter pulse is applied for one field period. In this case, the exposure time Tr is 1/10000 of a second. However, when the light is strong enough, the output signal Vo corresponding to the amount of charges read out from a certain photodiode 1 during one field period has the same level as that shown in FIG. 10A. In this case, however, if the amount of charges generated in the photodiode 1 during the time duration between the shutter pulse .PHI.s' and the read pulse .PHI.R, exceeds a photodiode storage capacity (i.e., the amount of charges that the photodiode 1 can store), the excessive charges overflow from the photodiode 1 to the vertical CCD. As a result, the quality of picture is deteriorated.
FIG. 10C corresponds to the case where a shutter pulse is always applied for each horizontal blanking period during one field period even before the exposure is initiated. In such a case, since the charges generated in the photodiode 1 are caused to periodically flow toward the substrate even before the exposure is initiated, the charges generated in the photodiode 1 do not leak out to the vertical CCD.
Since the shutter pulse should have a large pulse amplitude, a high voltage is required to generate the shutter pulse. As the exposure time is shortened, the number of shutter pulses to be applied is increased. As a result, in the solid-state imaging device having a conventional electronic shutter function, the power consumption is disadvantageously increased. This is a very serious obstacle to realizing a camera for multimedia, an area in which it is particularly required to have reduced power consumption.